First version was designed using student version of
Xilinx Foundation 2.1 i software mostly with schematic
design entry and partly in Abel language. Details of this
implementation were published in [9]. As a consequence
of schematic design entry, this version is incompatible
with some of the later versions of Xilinx software since
those versions don't have schematic design entry. There is
also no compatibility with other FPGA vendors.