Slide 37 shows how the Acknowledge phase is done
and how slave devices can stretch the clock signal.
Most Philips slave devices do not control the clock line.
Slide 38 shows how multiple masters can synchronize
their clocks, for example during arbitration. When bus
capacitance affects the bus rise or fall times the master
will also adjust its timing in a similar way.
If there are two masters on the same bus, there are
arbitration procedures applied if both try to take control
of the bus at the same time. When two chips try to start
communication at the same time they may even
generate a few cycles of the clock and data that
‘match’, but eventually one will output a ‘low’ when
the other tries for a ‘high’. The ‘low’ wins, so the
‘loser’ device withdraws and waits until the bus is freed
again. Once a master (e.g., microcontroller) has control,
no other master can take control until the first master
sends a stop condition and places the bus in an idle
state.
Slide 40 shows there are multiple ways to control I2C
slaves.