The proposed mechanism performs the tag comparison in
two stages. At the first stage, only the X least significant bits
are checked in all the ways of the target set. The few number
of least significant bits used in the mechanism, allows the
first comparison to be done faster, introducing negligible time
penalty. At the second stage, the remaining bits of the tag are
compared to the corresponding tag bits of the virtual address
of the block that is being searched. This second comparison,
which implies more bits, is only performed in the ways that
succeed the first comparison.
The proposed mechanism performs the tag comparison intwo stages. At the first stage, only the X least significant bitsare checked in all the ways of the target set. The few numberof least significant bits used in the mechanism, allows thefirst comparison to be done faster, introducing negligible timepenalty. At the second stage, the remaining bits of the tag arecompared to the corresponding tag bits of the virtual addressof the block that is being searched. This second comparison,which implies more bits, is only performed in the ways thatsucceed the first comparison.
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