The STM32, illustrated in Figure 2.3 connects the three buses defined by the Cortex-M3 through a micro-controller level bus matrix. In the STM32, the ICode bus connects the CM3 instruction interface to Flash Memory, the DCode bus connects to Flash memory for data fetch and the System bus provides read/write access to SRAM and the STM32 peripherals. The peripheral sub-system is supported by the AHB bus which is further divided into two sub-bus regions AHB1 and AHB2. The STM32 provides a sophisticated direct memory access (DMA) controller that supports direct transfer of data between peripherals and memory.