Our cache consistency protocol, is adapted directly from a
mainframe SC (System Control) design. One advantage of
this is that statistics are readily available for all types of bus
transactions from real 2-way MP traces and the MP degradation due to bus contention can be simulated. This protocol
is similar to the Illinois protocol [14] in many ways except that
the DIRTY (i.e. exclusive and changed) status is preserved for
a cache-to-cache transfer during a bus read miss. We did not
choose the store-broadcasting scheme which is used in the
Firefly and the Dragon protocols [13] because in the
mainframe environment shared data, mostly system-related
data, are expected to be used less frequently and with locality
(both temporal and spatial). But more detail studies are
needed before we can make the conclusion.