Note 1: Individual interrupt flag bits are set regardless of the status of their corresponding
mask bit or the GIE bit.
Note 2: When an instruction that clears the GIE bit is executed, any interrupts that were
pending for execution in the next cycle are ignored. The CPU will execute a NOP in
the cycle immediately following the instruction which clears the GIE bit. The interrupts
which were ignored are still pending to be serviced when the GIE bit is set
again.