TRANSFORMER RESET
In any single-ended power stage design, the plan for
transformer reset is one of the first design decisions
needed. In providing a power pulse to the output, the
transformer is driven in one polarity for a finite number
of volt-seconds. To prevent saturation, the same number
of volt-seconds must be provided in the opposite
polarity between the termination of one power pulse
and the beginning of the next one. Since it is the voltsecond
product which must be met, many compromises
can be made between the amount of reset
voltage allowed and the time allocated. The UCC3570
simplifies this analysis to the extent that the worst case
situation will always be at the lowest operating voltage.
This is because, when properly set up, the voltage
feed-forward feature will automatically increase the
minimum off-time as the input voltage increases.