Image processing module
The system image processing uses two methods to
achieve. One is the use of pipelining and parallel processing,
entirely completed by the hardware circuit module designed
in the FPGA. The other is the combination of Nios II with
the custom hardware peripheral circuits. The image
preprocessing in this system uses the first approach, the
follow-up treatment uses the second approach. The whole
preprocessing part is achieved by the custom hardware for
respectively median filtering and edge detection operation.
The data in every three lines is separately stored in three line
buffer memories, and then sent to the edge detection module
to process.