We realized the Komodo pipeline, the Priority Manager, the Signal Unit and some peripheral modules on an FPGA prototype board. With four implemented thread slots and a
stack size of 512 entries per thread, our microcontroller has an equivalent gate count of about 490000. A synthesis of the priority manager based on the LSI10K library, which is shipped with Design are shows that the design is able to run at a frequency of about 30 MHz. A cycle time of about 300 MHz should be possible, when projecting this result to a contemporary gate-array technology.