Putting together all of the above, we arrive at the equivalent circuit model shown in Fig. 2.3. Note that the output is in phase with (has the same sign as)u₂ and out of phase with(has the opposite sign of) u₁. For this reason, input terminal 1 is called the inverting input terminal and is distinguished by a “–” sing, while input terminal 2 is called the noninverting input terminal and is distinguished by a “+” sing. Signal u₂ – u₁ and hence ignores any signal common to both inputs. That is, if u₁ = u₂ = 1V, then the output will–ideally–by zero. We call this property common-mode rejection, and we conclude that an ideal op amp has infinite common-mode rejection. We will have more to say about this point later. For the time being note that the op amp is a differential-input, single-ended-output amplifier, with the latter