8 Conclusions and future work
The paper presented a high-level dataflow-based methodology
that provides a unified and portable approach for the
hardware–software co-design. The portability of applications
has been demonstrated by validating several configurations
onto different platform architectures. This design
feature makes possible to test and validate the performance
of a large number of design option, fundamental feature
enabling the rapid prototyping of applications onto heterogeneous
architectures.
From the design space exploration side, future works of
the design flow will focus on the improvement of the
scheduling and partitioning heuristics. Particularly, some
performance improvements may result from a refinement of
the simple assumptions on the communication model
between partitions. Another intriguing research direction
consists of exploiting finer granularity and architectureaware
parallelism such as SIMD and MIMD within the
source code synthesis of actor executions. Such opportunity
may enable to take advantage of instruction-level parallelism
of VLIW or GPU architectures. From the implementation
side and synthesis of interconnections, works are in progress
for improving the communication bandwidth obtainable
between PEs for the most used interface components.