The placement accuracy of LED die is the KPI of
this process. The stack up tolerance analysis indicates
the allowable placement accuracy taking account the
plating bump shifting and bump expansion after
applying force and ultrasonic power is +/- lO urn with
the clearance design of 25um from p-metal. Fig.6
shows the process steps in themosonic die attach and
illustrate the potential area of shorting. The diagram in
green circle shows the clearance design of 25um.
Process capability plot (Fig.7) shows that the Cpk is
less than 1.0 which indicates the yield of the process is
poor.
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