MULTIPROCESSOR SYSTEM-ON-CHIPS (MPSoCs)
are emerging as one of the technologies providing a
way to support the growing design complexity of embedded
systems, since they provide processor architectures adapted
to selected problem classes, allied to programming flexibility.
To ensure flexibility and performance, future MPSoCs will
combine several types of processor cores and data memory
units of widely different sizes, leading to a very heterogeneous
architecture.
The increasing interconnection complexity and the known
scalability deficiency of buses require another model of interconnection.
The communication among cores of an MPSoC