It has two designer set limits,
an upper limit (Vh) and a lower limit( VI). Whenever the input
voltage Vin lies between these two limits .i.e, Vh :s; Vin :s;
VI, the output obtained is a high [1]. Circuit diagram for a
conventional window comparator circuit is shown in Fig.l. It
requires two op-amps and an AND gate. Window cOluparator
circuits are employed in a varity of applications. An important
application being the input stage for a low power SAR ADC
with a bypass window for biomedical applications [2]. In [2],
low power requirement is achieved by utilizing a window
comparator stage at the input section of the proposed circuit
to limit the voltage to a predefined level.