Our MDIS approach can avoid the page swapping that occurs in a memory hierarchy
because of the elimination of data duplication between main memory and secondary
storage. The MDIS consists of two major parts connected by an NVRAM translation
layer, as shown in Figure 1. Those two parts are the virtually decoupled NVRAM module
and an NVRAM performance optimizer (NVPO). The latter effectively minimizes
the performance gap between the lowest cache level and the NVRAM. In this article,
we focus on designing these hardware modules and the corresponding virtual memory
management module for the OS. The NVRAM translation layer is conceptually
described in this article in terms of the basic operational flow