The purpose of this lab assignment is to introduce operating principles and characteristics of a
phase-locked loop (PLL) built around CMOS 4046 integrated circuit.
In the lab assignment #5, this PLL will be used to design a data modem based on a digital
frequency modulation technique called frequency-shift keying (FSK). Before approaching the design
problem, it is necessary to understand principles of operation and characteristics of the PLL.
This handout includes: a brief summary of the theory of phase-locked loops in Section 1,
description of the PLL components on the 4046 chip in Section 2, experiments you need to perform
in the lab in Section 3, and the prelab assignment in Section 4.