So far our assumption has been that the latency of all operations, or at least the simple
operations, is one base machine cycle. As we discussed previously, no known machines have
this characteristic. For example, few machines have one cycle loads without a possible data
interlock either before or after the load. Similarly, few machines can execute floating-point
operations in one cycle. What are the effects of longer latencies? Consider a machine where
ALU operations are one cycle, but loads, stores, and branches are two cycles, and floating-point
operations are three cycles. Then the base machine is actually like a slightly superpipelined
machine. If we multiply the execution frequency of each instruction by its latency, we get the
average degree of superpipelining.