The bias circuit is shown in Fig. 8.42. It consists of two deliberately mismatched transistors, Q12 and Q13, with Q12 usually about four times wider than Q13. A resistor RB is connected
in series with the source of Q12. Since, as will be shown, RB determines both the bias current
I
B and the transconductance gm12, its value should be accurate and stable; in most applications, RB would be an off-chip resistor. In order to minimize the channel-length modulation
effect on Q12, we include a cascode transistor Q10 and a matched diode-connected transistor
Q11 to provide a bias voltage for Q10. Finally, a p-channel current mirror formed by a pair of
matched devices, Q8 and Q9, both replicates the current IB back to Q11 and Q13, and provides
a bias line for Q5 and Q7 of the CMOS op-amp circuit of Fig. 8.41.5
The circuit operates as follows: The current mirror (Q8, Q9) causes Q13 to conduct a current equal to that in Q12, that is, IB. Thus,