In this paper design and implementation of a two
stage fully differential, RC Miller compensated CMOS
operational amplifier is presented. High gain enables
this circuit to operate efficiently in a closed loop
feedback system, whereas high bandwidth makes it
suitable for high speed applications. The design is also
able to address any fluctuation in supply or dc input
voltages and stabilizes the operation by nullifying the
effects due to perturbations. Implementation has been
done in 0.18 um technology using libraries from tsmc
with the help of tools from Mentor Graphics and
Cadence. Op-amp designed here exhibits >95 dB DC
differential gain, ~135 MHz unity gain bandwidth,
phase margin of ~53o
, and ~132 V/uS slew rate for
typical 1 pF differential capacitive load.
The power dissipation for 3.3V supply voltage at
27o
C temperature under other nominal conditions is
2.29mW. Excellent output differential swing of 5.9V
and good liner range of operation are some of the
additional features of design.