The rest of the PEs place their outputs in the highimpedance state using internal tri-state buffers. The proposed architecture of the SPCU is completely distributed without any centralised control. All the PEs have identical architecture and each one operates independently in complete synchronisation with the rest. Synchronisation is made possible by ensuring that each PE starts the execution of each step at the same time. Although the same step is executed by all the PEs in parallel, they may perform different actions based on the result of a condition evaluation.