On the other hand, there is an option to construct a simple
computer by using a GUI that allow to design at gate level by
placing components in a spreadsheet, it is easy to use and
easy to understand dataflow between components even is
more comprehensive if we can create all of the computer
components from logical gates.
In the present work, the design of an 8-bit data width
Reduced Instruction Set Computer (RISC) processor is
presented; it was developed with simplicity and
implementation efficiency in mind. It has a complete
instruction set, program and data memories, general purpose
registers and a simple Arithmetical Logical Unit (ALU) for
basic operations. It operates following a multi-cycle
execution nature and is implemented on a Xilinx Spartan-3E
FPGA.
In the following section the main characteristics of
presented processor are presented. The third section
introduces the instruction set and its instruction format used
to interact through a programming language with the
processor. Fourth section presents the different blocks that
constitute the processor and its integration. On section five,
timing and implementation results are presented followed by
conclusions at sixth section.