5. Results
Main goals of our processor are to provide highly powerful computing and enough flexibility.
In order to evaluate these performances, we build a staticreconfigurable processor on FPGA and write assemblers manually. We keep simulation results objective by doing experiments more times.
The staticreconfigurable simulator supports two configurable modes. The first mode supports instruction of FFT_Ins.
The second mode supports Rake_Ins. Both of two modes support Turbo_Ins or Viterbi_Ins.