Due to space constraints, we cannot include a formal
proof that DVMC’s three invariants ensure consistency,
but we provide the proof in a separate technical report
[17] and present a sketch of the argument here.
A key observation for understanding DVMC is that
in a system with the SWMR property (i.e., virtually all
current cache coherent systems) a memory operation
performs globally as soon as it accesses the highest level
of the local cache hierarchy. Therefore the global ordering of operations from a given processor is identical to
the cache access order at that processor. Thus, we can
dynamically verify the consistency model ordering
requirement in Definition 1 by checking that reorderings
between program order and cache access order are valid
and that the SWMR property was not violated. The
former is ensured by the Allowable Reordering invariant, while the latter is guaranteed by the Cache Coherence invariant.