which is needed by CPU before referenced again. In this case, the data is “dead” indeed. Still leaving these data mentioned above would makes matter worse. On the one hand, it is a kind of wasting cache resource which leads to more cache misses. On the other hand, refreshing these “dead” data for unknown period of time surely goes against energy saving. In this paper, we define a data block status “dead”, as this data block has not been replaced when its data retention time T dr is very close to line counter since it located in L1 cache.So, what can we do to avoid refreshing when a data block reaches its retention time T dr in STT-RAM L1? Fig. 2 lists an example of our proposed dead data block process strategy. Note T S and T S’ are random time intervals (T S < T dr and T S’