The dual of a DAC is an ADC (analog digital converter) which converts
analog signals to digital values. The STM32 processors include one or
more ADC peripherals – there is one on the medium density value line parts.
The STM32 ADC uses successive approximation – the ADC has the ability
to generate a discrete set of voltages and to compare these against a sampled
input voltage; it essentially performs binary search to find the best approximation.
For 12 bits of accuracy, the STM32 takes at least 14 cycles of the
ADC clock (a multiple of the system clock) – the extra 2 cycles are overhead
due to sampling. Thus, With a 12 MHz ADC clock, the STM32 ADC can
perform a sample in slightly more than 1sec.
Although the STM32 VL component has a single ADC, it can support
multiple analog inputs. The basic architecture is illustrated in Figure 14.
On the discovery board, PA0-PA7, PB0-PB1, and PC0-PC5 may all be used
as analog inputs which can be multiplexed to the ADC. The ADC may be
configured to sample any subset of these inputs in succession. There are
two basic modes of operation – single and continuous conversion. With single
conversion, once the ADC is triggered, it converts a single input and stores the
result in its data register (DR). The trigger may either come from software or
signal such as a timer. In continuous mode, the ADC starts another conversion
as soon as it finishes one. The ADC may also operate in scan mode where
a set of inputs to be scanned is configured. A single conversion is performed
for each configured input in succession. Scans may also be continuous in the
sense that a new scan begins as soon as one is completed.