The EAC technology development process involved starting from the concept EAC test vehicle (TV) with low PCB layer count to a highly complex TV with high PCB layer count. Initially, the EAC TV showed high rates of interfacial delamination at Material A-Material B interface. These defects were fixed by improving interfacial bonding during substrate manufacturing. Even when the interfacial delamination was fixed, the dissimilar material expansion in thickness direction resulted in higher chip warpage at room temperature and at high temperature.