A fallout from this sync pulse scheme is that for static timing
analysis (STA) performed at CMP frequency of 1.4 GHz, the
domain crossing timing path is specified as a multi-cycle path
with one CMP cycle ( 714 ps@1.4 GHz) for setup/hold. The
STA tools easily handle constraints specified in this manner.
After accounting for clk-Q, propagation delay, flip-flop setup/
hold times, clock skew and uncertainty, the tool dumps out a
slack in the report, thus eliminating the need for post-processing
thousands of inter-domain paths. Hence, the interfaces can be
timed just as robustly to match the design.