Although vector machines also take advantage of (unrolled-loop) instruction-level parallelism,
whether a machine supports vectors is really independent of whether it is a superpipelined,
superscalar, or base machine. Each of these machines could have an attached vector unit.
However, to the extent that the highly parallel code was run in vector mode, it would reduce the
use of superpipelined or superscalar aspects of the machine to the code that had moderate
instruction-level parallelism.