Design teams develop and adopt hierarchical flows for many reasons. Complexity management and the need to shorten the turnaround time on large designs are usually at the top of the list. Using a hierarchical flow, the design can be attacked by different teams in different locations, resulting in concurrent engineering of the overall product. In addition, SoC design and intellectual property (IP) reuse methodologies also demand a hierarchical approach to chip design, because they involve bringing preexisting blocks into the design process. F igure 2.6 illustrates an example of an SoC block diagram and the various modules that comprise the SoC.