Solution
One possible arrangement is shown in Fig. 8.5. Notice that pins 3 and 4 are tied together, as are pins 10 and 11: thus no input leads are left unconnected and the two gates simply function as 2-input gates. The third NOR gate is not used. (It can be a spare or can be used elsewhere.)
The standard logic symbols for an RS flip-flop are shown in Fig.8-6 along with its truth table. The truth table is necessary since it describes exactly how the flip-flop function.