3.1.5 Basic Timer
The basic timer is configured to give a one-second timer interrupt, based on the 32-kHz ACLK, for the real-time clock (RTC) function.
3.1.6 Watchdog Timer
The watchdog is enabled. The basic timer interrupt must reset it periodically; otherwise, the watchdog generates a system reset.
3.1.7 Voltage Supervisor and System Voltage Monitoring
The built-in hardware Supply Voltage Supervisor (SVS) circuit is turned on to ensure that the MCU is in a known state all the time. At reset, the SVS is first turned on to check whether or not the AVCC level is high enough for the MCU clock of 8 MHz. Once this is confirmed, the SVS is fully enabled to generate a system reset when the voltage dips below the minimum allowed level for that operating speed.
The Vsupply voltage (see Figure 2) is divided down and connected to the input of the comparator. When a mains blackout occurs, Vsupply starts to drop. The comparator can, therefore, warn the system to prepare to go into the ultra-lower power RTC mode.