The RC ladder filter (three sections of C = 0.02 p.F and R = 10kO) is used to remove the
sum-frequency component. The free-running frequency is adjusted with R1 so that the dc voltage level
at the output (pin 7) is the same as that at pin 6. Then an input at frequency 1070 Hz will drive the
decoder output voltage to a more positive voltage level, driving the digital output to the high
level (space, or + 14V). An input at 1270 Hz will correspondingly drive the 565 dc output less
positive with the digital output, which then drops to the low level (mark, or -5 V).