I2C Overview
What is I2C ? (Inter-IC)
• Originally, bus defined by Philips providing a simple way to talk between IC’s by using a minimum number of pins • A set of specifications to build a simple universal bus guaranteeing compatibility of parts (ICs) from different manufacturers: – Simple Hardware standards – Simple Software protocol standard • No specific wiring or connectors - most often it’s just PCB tracks • Has become a recognised standard throughout our industry and is used now by ALL major IC manufacturers
• Each device connected to the bus is software addressable by a unique address and simple master/slave relationships exist at all times; masters can operate as master-transmitters or as master-receivers.
• It’s a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer.
• Serial, 8-bit oriented, bi-directional data transfers can be made at up to 100 kbit/s in the Standardmode, up to 400 kbit/s in the Fast-mode, or up to 3.4 Mbit/s in the High-speed mode.
• On-chip filtering (50 ns) rejects spikes on the bus data line to preserve data integrity.
• The number of ICs that can be connected to the same bus segment is limited only by the maximum bus capacitive loading of 400 pF. Slide 24 Originally, the I2C bus was designed to link a small number of devices on a single card, such as to manage the tuning of a car radio or TV. The maximum allowable capacitance was set at 400 pF to allow proper rise and fall times for optimum clock and data signal integrity with a top speed of 100 kbps. In 1992 the standard bus speed was increased to 400 kbps, to keep up with the ever-increasing performance requirements of new ICs. The 1998 I2C specification, increased top speed to 3.4 Mbits/sec. All I2C devices are designed to be able to communicate together on the same two-wire bus and system functional architecture is limited only by the imagination of the designer.
But while its application to bus lengths within the confines of consumer products such as PCs, cellular phones, car radios or TV sets grew quickly, only a few system integrators were using it to span a room or a building. The I2C bus is now being increasingly used in multiple card systems, such as a blade servers, where the I2C bus to each card needs to be isolatable to allow for card insertion and removal while the rest of the system is in operation, or in systems where many more devices need to be located onto the same card, where the total device and trace capacitance would have exceeded 400 pF
New bus extension & control devices help expand the I2C bus beyond the 400 pF limit of about 20 devices and allow control of more devices, even those with the same address. These new devices are popular with designers as they continue to expand and increase the range of use of I2C devices in maintenance and control applications.
I2C Features
5) Put a message (one bit) on the bus telling whether it wants to SEND or RECEIVE data from the other chip. (The read/write wire is gone!)
• Only two bus lines are required: a serial data line (SDA) and a serial clock line (SCL)
I2C Communication Procedure One IC that wants to talk to another must: 1) Wait until it sees no activity on the I2C bus. SDA and SCL are both high. The bus is 'free'. 2) Put a message on the bus that says 'its mine' - I have STARTED to use the bus. All other ICs then LISTEN to the bus data to see whether they might be the one who will be called up (addressed).
3) Provide on the CLOCK (SCL) wire a clock signal. It will be used by all the ICs as the reference time at which each bit of DATA on the data (SDA) wire will be correct (valid) and can be used. The data on the data wire (SDA) must be valid at the time the clock wire (SCL) switches from 'low' to 'high' voltage.
4) Put out in serial form the unique binary 'address' (name) of the IC that it wants to communicate with.
5) Put a message (one bit) on the bus telling whether it wants to SEND or RECEIVE data from the other chip. (The read/write wire is gone!)