Figure 9 shows normalized runtime, and DRAM power and energy consumptions of SDS for the write-back cache with x8 chips. Runtime increases by up to 5.3% and 1.3% on average, while DRAM power and energy consumptions are reduced by up to 25% and 23.7% and by average 13.3% and 11.3%, respectively. With the x4 chips, average 0.4%, 1.2%, and 0.7% of runtime and DRAM power and energy savings increase compared to the x8 chip organization. For the write-through cache with x8 and x4 chips, runtime increases by 1.6% and 1.9% on average, respectively, and average DRAM power and energy consumptions are reduced by 15.7% and 13.2%, and 16.9% and 14.1%, respectively