With the continuous growth of capacity of nonvolatile
memories (NVM) in-system programming (ISP) has
become the most time-consuming step in post-assembly phase of
board manufacturing. This paper presents a method to assess
ISP solutions for on-chip and on-board NVMs. The major
contribution of the approach is the formal basis for comparison of
state-of-the-art ISP solutions. The effective comparison pin-points
the time losses, that can be eliminated by the use of multiple
page buffers. The technique has proven to achieve exceptionally
short programming time, which is close to the operational speed
limit of modern NVMs. The method is based on the ubiquitous
JTAG access bus which makes it applicable for the most board
manufacturing strategies despite a slow nature of JTAG bus.
Index Terms—ISP, processor-centric board, JTAG, NVM.