Abstract—This paper proposes a load-split derivative superposition (DS) linearization technique applied to a K-band CMOS power amplifier (PA). Conventional DS is usually used to cancel high-order transconductance nonlinearity. However, low input impedance leading to gain degradation limits the application of this technique. In order to solve this problem, a commondrain buffer is used as an input replica to split the extra loading from the auxiliary DS path, which effectively increases the input impedance. The proposed PA demonstrates a superior thirdorder intermodulation (IM3) distortion cancellation. The sweetspot of IM3 is close to output 1-dB compression power (OP1dB) without severe small-signal gain degradation.