II.Aoutiines the design of serial transceiver. II.Bdiscusses the all-important frame buffer for the image memory. II.Cshows the implementation details of Instruction parser module and II.D is about the design and implementation of drawing module. It is this module which actually writes on the frame buffer and completes instructions. Section II.Eis on VGA Controller and its design for driving the monitor.
Section III gives the results of synthesizing the architecture. The results section also points some performance figures obtained with this GPo.
Lastly, section IV concludes this paper with reflection on the work, some applications and how further improvements can be brought about.