• Physical challenges: These are due to the increment of tunneling and leakage currents as the devices are
becoming smaller, thus impacts the performance and functionality of CMOS devices.
• Material challenges: These basically come from the inability of the dielectric and wiring materials to provide
reliable insulation and conduction, respectively with continued scaling.
• Power-thermal challenges: These are because of the ever increasing number of transistors integrated per unit-area,
which demands larger power consumption and higher thermal dissipation.
• Technological challenges: These are the results from the incompetency of lithography-based techniques to provide
the resolution below the wavelength of the light to
manufacture to CMOS devices.
• Economical challenges: These are mainly due to the rising in cost of production, fab, and testing that may
reach a point where it will be not affordable from economic point of view.