There is usually a translator, which translates virtual to real memory addresses, and
a TLB (translation lookaside buffer) which
buffers (caches) recently generated (virtual
address, real address) pairs. Depending on
machine design, there can be an ASIT (address space identifier table), a BIAS (buffer
invalidation address stack), and some writethrough buffers. Each of these is discussed
in later sections of this pape