The proposed 3D hybrid NAND SSD is evaluated. A TLM (transaction level
modeling) -based SSD emulator that can comprehensively simulate performance,
energy consumption and P/E cycles has been developed. The profile of the write data
input obtained from a financial server [6] is shown in Fig. 7. For comparison,
conventional MLC NAND and hybrid SLC/MLC NAND SSDs are also evaluated.
SLC NAND is used instead of ReRAM. The results for the write performance, write
energy and average P/E cycles are shown in Fig. 8. Compared with the conventional
MLC NAND SSD, the proposed SSD with AF, MRU and RAAF algorithms
shows 11 times higher performance and 79% lower write energy (Figs. 8(a) and 8(b)).
By using 3D TSV interconnects, the I/O energy is reduced by 27 times because the
huge capacitance of the wire bonding is almost eliminated. As a result, the total SSD
energy reduction reaches 93%. The speed and power overhead of the USFT
reference are negligibly small. Furthermore, the slope of the average MLC NAND
P/E cycles is decreased by 6.9 times in Fig. 8(c) by the proposed SSD. This directly
corresponds to a reduction in the replacement cost of a SSD storage system because
the slope determines the aging speed of the SSD. Although the MLC NAND P/E
cycles of the SLC/MLC NAND SSD also decreases by the proposed algorithms, the
slope of the P/E cycles of the SLC NAND become 250 times of that of the MLC
NAND, which is unacceptably high. This is because serious data fragmentation is
induced in the SLC NAND. The frequent block copy of SLC NAND degrades the
performance and the energy to the level of MLC only SSD. In ReRAM, such a data
fragmentation does not occur because the partial overwrite is possible. As a result, the
slope of the ReRAM P/E cycles is limited to 28 times of that of the MLC NAND in
the proposed SSD. Assuming MLC NAND endurance of 3×103, the required P/E
cycles for ReRAM is less than 105, which is acceptable for the ReRAM device
characteristics. Fig. 9 shows the valid page map of the conventional and proposed
SSD. The valid pages are scattered in the conventional SSD indicating that frequent
overwrites have occurred to the MLC NAND. On the other hand, the proposed
hybrid SSD efficiently uses ReRAM and shows less fragmentation of MLC NAND
because overwrites to MLC NAND are suppressed.
This paper also investigates the required ReRAM latency to obtain sufficient
improvements by the proposed algorithm. Fig. 10 show the proposed SSD write
performance and energy as a function of the ReRAM write latency. ReRAM read
latency is also varied. From the figures, both ReRAM write and read latency should
be less than 3μs to maintain high performance and low power operation. Considering
50ns write pulse, the 3μs access is achievable for ReRAM in write verify operation.
Table 2 summarizes this work. The proposed 3D hybrid SSD shows 11 times
higher performance, 93% lower write energy and 6.9 times higher endurance.