Binary Counter with Parallel Load
Counters employed in digital systems quite often require a para llel -load capability for transferring an initial binary number into the counter prinr to the count operation. Figure 6.1~ shows
the lop-level block diagram symbol and the logic diagram of a four-bit regis ter that has a paralle
lload capability and can operate as a counter. when eq ual to I . the input load co ntro l disables
the count operation and causes a transfer of data from the four data inputs into the four
flip-flops. If both contro l inputs are O. clock pulses do not change the state of the register.
The carry output becomes a 1 if all the flip-flops are equal to I while the count input is enabled.