Step 3. The values of resistances R1 and R2 are so selected that current I1 flowing through R1 and
R2 is atleast 10 times IB i.e. I1 ≥ 10 IB. When this condition is satisfied, good stabilisation is achieved.
Step 4. The zero signal IC should be a little more (say 20%) than the maximum collector current swing due to signal. For example, if collector current change is expected to be 3mA due to signal, then select zero signal IC j 3.5 mA. It is important to note this point. Selecting zero signal IC below this value may cut off a part of negative half-cycle of a signal. On the other hand, selecting a value much above this value (say 15mA) may unnecessarily overheat the transistor, resulting in wastage of battery power. Moreover, a higher zero signal IC will reduce the value of RC (for same VCC), resulting in reduced voltage gain.