However, in SB-MOSFETs, silicon in channel region reacts with the deposited metals. This reaction can cause the generation of trap states, causing microscopic inhomogeneity of Schottky barrier height [4]. Thus, for the improvement of the device performance, the interface of Schottky diode should be carefully analyzed. Until now, current–voltage (I–V) measurement method has been widely used to explore the trap states in Schottky diode by evaluating diode ideality factor [4], [5]. However, there has been no established method on the quantitative evaluation of trap density in the Schottky diode, although it is well established in the metal-insulator-semiconductor system [6].