used in the class, the lightweight ZPU is rather large. This
renders it even more interesting, because this larger design is
still manageable.
During the course, the ZPU code is checked with tool
support and minor mistakes are fixed. Testbenches for the ZPU
and the added components are also created. After designing,
the chip has to pass the simulation and test runs before a proper
functionality can be verified.
Before manufacturing as an IC, a prototype of the Dual-
ZPU for an FPGA-Board is evaluated. Now, the first performance
estimations can be assessed and possible impacts on
programs discussed. The previously developed test programs
can be run as test cases on the design. New bottlenecks like
the memory interface can now exactly be determined.
A direct connection to the computer architecture fundamentals
course is thusly possible. As such, the work required
to develop and verify features of processors is established.
The direct impact of changes to the architecture can also be
evaluated and contrasted with mathematical models.