We present an efficient implementation of the parallel heap data structure on a bus-based Silicon Graphics multiprocessor GT X/DD. Parallel heap is theoretically the first heap-based data structure to have implemented an optimally calculable parallel priority queue on an exclusive-read exclusive-write parallel random access machine. We compared it with
Raoand-Kumar’s concurrent heap and with the conventional serial heap accessed via a lock. The parallel heap outperformed others for fine-to-medium grains achieving speedups of two to four using six processors relative to the best sequential execution times. The concurrent heap, how- ever, exhibited performance comparable only to the serial heap. As expected for coarser grain, the serial heap performed at par with or better than others.