Larger and larger DRAMs are being demanded due to increasing program sizes and popular thread-level parallelism. However, this trend further increases power and energy consumptions of DRAMs. To reduce accesses to DRAM chips, we proposed a new DRAM system called Skinflint DRAM system, which exploits common unmodified bytes transferred from the processor to DRAMs at chip level. When all data going to the same chip are unmodified, the chip can continue to be in an inactive state, reducing activate/ precharge and write power consumptions as well as idle power consumption. Skinflint DRAM system has low performance, area, and energy overheads because it is implemented by extending conventional caches and by slightly modifying conventional DRAM system. Although we applied our scheme to x8 and x4 DRAM chip organizations, it can be applicable to x16 DRAM chip organization which are used mainly in embedded systems, too.