The presented performance figures of the PURE implementation
document a still “featherweight” solution. As
a result, the delay of an interrupted process due to queuing
overhead can be reduced when compared to more traditional
ways of queue synchronization that physically disable/
enable interrupts. This aspect is of particular significance
for (embedded) real-time systems whose goal, besides
others, must be to constrain the effects of disruptive
elements such as interrupts to an absolute minimum. Since
the PURE concept does without blocking of interrupts, the
latency of the highest-priority interrupt handler solely depends
on static parameters, such as the processor speed or
the number of CPU instructions, and not on dynamic aspects,
such as the timed occurrence of interrupts. Thus, that
latency can be determined in advance, before run-time.