Synchronization between the PEs and the organization of memory is such that every
element can access the memory without any conflict during the
processing of a whole subframe. The tool used to design the TTAs
is TCE (TTA co-design environment). It has also been discussed
briefly as a very handy tool to develop TTA based platforms.
The rest of the article is organized as follows. In Section 2, LTE
receiver architecture is discussed and the processing blocks under
consideration are explained. In Section 3, LTE frame structure and
resource allocation is described. Section 4 briefly explains about
TTA and TCE (TTA co-design environment). In Section 5, implementation of MPSoC for system under consideration has been explained. In Section 6, evaluation and comparison is presented.Finally, Section 7 concludes the article.