3.2 Placement Scheme
After floorplan design process, the result pattern cannot be directly used because the area of each module is not in practical dimension. Actual size patterns are obtained from the placement process as shown in Fig.6. The exact wiring cost and actual area are then evaluated. After rearranging modules with wiring length minimization objective, every cut between rearranged row is considered for crosstalk minimization. This step is called routing. Minimizing of the total wiring length and crosstalk can significantly improve the performance of the chip.