Hyper Threading
One way to make instruction execution more efficient is to improve the way the pipeline works. The basic approach is to do the amount of work possible in a single clock cycle (multitasking). There are various ways to achieve this goal though.
CPUs process multiple instructions at the same time (for example, while one instruction is fetched, another is being decoded, another is being executed, and another is being written back to memory). This is referred to as a superscalar architecture, as multiple execution units are required. Superscalar architectures also feature lonher pipeline with multiple stages but shorter actions (micro-ops) at each stage, referred to as superpiplelining.
The original Pentium had a 5-stage pipleline; by contrast, the pentium 4 has up to 31 stages (NetBurst architecture). NetBurst actually proved relatively inefficient in terms of power and thermal performance, so Intel reverted to a modified form of the P6 architectur iy used in Pentium 2s and 3s for its "Core" brand CPUs (With around 14 Stages).
Hyper ThreadingOne way to make instruction execution more efficient is to improve the way the pipeline works. The basic approach is to do the amount of work possible in a single clock cycle (multitasking). There are various ways to achieve this goal though.CPUs process multiple instructions at the same time (for example, while one instruction is fetched, another is being decoded, another is being executed, and another is being written back to memory). This is referred to as a superscalar architecture, as multiple execution units are required. Superscalar architectures also feature lonher pipeline with multiple stages but shorter actions (micro-ops) at each stage, referred to as superpiplelining.The original Pentium had a 5-stage pipleline; by contrast, the pentium 4 has up to 31 stages (NetBurst architecture). NetBurst actually proved relatively inefficient in terms of power and thermal performance, so Intel reverted to a modified form of the P6 architectur iy used in Pentium 2s and 3s for its "Core" brand CPUs (With around 14 Stages).
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